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INTEGRATED CIRCUITS
DATA SHEET
OM6206 65 x 102 pixels matrix LCD driver
Product specification File under Integrated Circuits, IC17 2001 Nov 14
Philips Semiconductors
Product specification
65 x 102 pixels matrix LCD driver
CONTENTS 1 2 3 4 5 6 6.1 6.1.1 6.1.2 6.1.3 6.1.4 6.1.5 6.1.6 6.1.7 6.1.8 6.1.9 6.1.10 6.1.11 6.1.12 6.1.13 6.1.14 7 7.1 7.2 7.3 7.4 7.5 7.6 7.7 7.7.1 FEATURES APPLICATIONS GENERAL DESCRIPTION ORDERING INFORMATION BLOCK DIAGRAM PINNING Pin functions R0 to R64: row driver outputs C0 to C101: column driver outputs VSS1 and VSS2: ground supply rails VDD1, VDD2 and VDD3: supply voltage rails VLCDIN: LCD supply voltage VLCDOUT: voltage multiplier output VLCDSENSE: voltage multiplier regulation input T1 to T5: test pins SDIN: serial data line SCLK: serial clock line D/C: mode select SCE: chip enable OSC: oscillator RES: reset FUNCTIONAL DESCRIPTION Oscillator Address counter Display data RAM (DDRAM) Timing generator Display address counter LCD row and column drivers Addressing Data structure 8 8.1 8.2 8.3 8.3.1 8.3.2 8.3.3 8.4 8.4.1 8.5 8.6 8.7 8.8 8.9 8.10 9 10 11 12 13 13.1 13.2 13.3 13.4 14 15 16 17 18 19 INSTRUCTIONS
OM6206
Initialization Reset function Function set PD V H Display control D and E Set Y-address of RAM Set X-address of RAM Set high-voltage generator stages Bias system Temperature control Set VOP value LIMITING VALUES HANDLING DC CHARACTERISTICS AC CHARACTERISTICS APPLICATION INFORMATION Programming example for the OM6206 Application diagrams Application for COG Chip information BONDING PAD INFORMATION DEVICE PROTECTION CIRCUITS TRAY INFORMATION DATA SHEET STATUS DEFINITIONS DISCLAIMERS
2001 Nov 14
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Philips Semiconductors
Product specification
65 x 102 pixels matrix LCD driver
1 FEATURES
OM6206
* Low power consumption, suitable for battery operated systems * Temperature compensation of VLCD * Temperature range from -40 to +85 C * Slim chip layout, suited for Chip-On-Glass (COG) applications. 2 APPLICATIONS
* Single-chip LCD controller and driver * 65 row and 102 column outputs * Display data RAM 65 x 102 bits * On-chip: - Configurable 5 (4, 3 and 2) x voltage multiplier generating VLCD (external VLCD also possible) - Generation of intermediate LCD bias voltages - Oscillator requires no external components (external clock also possible). * External reset input pin RES * Serial interface maximum 4.0 Mbits/s * CMOS compatible inputs * Multiplex rate of 1 : 65 * Logic supply voltage range from 2.5 to 5.5 V (VDD1 to VSS) * High-voltage generator supply voltage range from 2.5 to 4.5 V (VDD2 and VDD3 to VSS) * Display supply voltage range from 4.5 to 9.0 V (VLCD to VSS) 4 ORDERING INFORMATION
* Telecom equipment. 3 GENERAL DESCRIPTION
The OM6206 is a low-power CMOS LCD controller and driver, designed to drive a graphic display of 65 rows and 102 columns. All necessary functions for the display are provided in a single chip, including on-chip generation of LCD supply and bias voltages, resulting in a minimum of external components and low power consumption. The OM6206 interfaces to microcontrollers via a serial bus interface.
PACKAGE TYPE NUMBER NAME OM6206U/Z - chip with bumps in tray DESCRIPTION VERSION -
2001 Nov 14
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Philips Semiconductors
Product specification
65 x 102 pixels matrix LCD driver
5 BLOCK DIAGRAM
OM6206
handbook, full pagewidth
VSS1
VSS2
VDD1
VDD2
VDD3 180
C0 to C101 37 to 138
R0 to R64 2 to 15, 18 to 36, 139 to 156, 159 to 172 ROW DRIVERS
214 to 217, 221, 222 224 to 229
200 to 213
174 to 179
181 to 193
COLUMN DRIVERS VLCDIN BIAS VOLTAGE GENERATOR DATA LATCHES
SHIFT REGISTER
RESET VLCDSENSE VLCDOUT 237 230 to 236 HIGH VOLTAGE GENERATOR DISPLAY DATA RAM (DDRAM) 65 x 102
1
RES
OSCILLATOR
199
OSC
T1 T2 T3 T4 T5
218 198 223 220 219 DATA REGISTER ADDRESS COUNTER
TIMING GENERATOR
OM6206
DISPLAY ADDRESS COUNTER
I/O BUFFER 195 SDIN 194 SCLK 196 D/C 197
MGT859
SCE
Fig.1 Block diagram.
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Philips Semiconductors
Product specification
65 x 102 pixels matrix LCD driver
6 PINNING SYMBOL R0 to R18 R19 to R32 R33 to R50 R51 to R64 C0 to C101 VSS1 VSS2 VDD1 VDD2 VDD3 VLCDIN VLCDOUT VLCDSENSE T1 T2 T3 T4 T5 SCLK SDIN D/C SCE OSC RES PAD 18 to 36 2 to 15 156 to 139 159 to 172 37 to 138 DESCRIPTION LCD row driver outputs LCD row driver outputs LCD row driver outputs LCD row driver outputs LCD column driver outputs 6.1.3
OM6206
VSS1 AND VSS2: GROUND SUPPLY RAILS
The supply rails VSS1 and VSS2 must be connected together. 6.1.4 VDD1, VDD2 AND VDD3: SUPPLY VOLTAGE RAILS
214 to 217, ground supply 1 221 and 222 200 to 213 174 to 179 181 to 193 180 224 to 229 230 to 236 237 218 198 223 220 219 194 195 196 197 199 1 ground supply 2 supply voltage 1 supply voltage 2 supply voltage 3 LCD supply voltage (VLCD) voltage multiplier output (VLCD) voltage multiplier regulation input (VLCD) test 1 input test 2 output test 3 input/output test 4 input test 5 input serial clock input serial data input data or command selection input chip enable (active LOW) oscillator signal input external reset input (active LOW)
VDD2 and VDD3 are the supply voltage for the internal voltage generator. Both have the same voltage and should be connected together outside the chip. VDD1 is used as supply voltage for the rest of the chip. VDD1 can be connected together with VDD2 and VDD3 but in this case care must be taken to respect the supply voltage range (see Chapter 11). If the internal voltage generator is not used the pins VDD2 and VDD3 must be connected to pin VDD1 or connected to the supply voltage. 6.1.5 VLCDIN: LCD SUPPLY VOLTAGE
Positive supply voltage for the liquid crystal display. An external LCD supply voltage can be supplied using pin VLCDIN. In this case, VLCDOUT has to be left open and the internal voltage generator has to be programmed to zero. If the OM6206 is in Power-down mode, the external LCD supply voltage has to be switched off. 6.1.6 VLCDOUT: VOLTAGE MULTIPLIER OUTPUT
Positive supply voltage for the liquid crystal display. If the internal voltage generator is used, the two supply rails VLCDIN and VLCDOUT must be connected together. If an external supply is used this pin must be left open. 6.1.7 VLCDSENSE: VOLTAGE MULTIPLIER REGULATION
INPUT
VLCDSENSE is the input of the internal voltage multiplier regulation. If the internal voltage generator is used then VLCDSENSE must be connected to VLCDOUT. If an external supply voltage is used then VLCDSENSE can be left open or connected to ground. 6.1.8 T1 TO T5: TEST PINS
6.1 6.1.1
Pin functions R0 TO R64: ROW DRIVER OUTPUTS
These pins output the row signals. 6.1.2 C0 TO C101: COLUMN DRIVER OUTPUTS T1, T3, T4 and T5 must be connected to VSS, T2 must be left open. Not accessible to user.
These pins output the column signals.
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Philips Semiconductors
Product specification
65 x 102 pixels matrix LCD driver
6.1.9 SDIN: SERIAL DATA LINE 7.2 Address counter
OM6206
Input for the data line. 6.1.10 SCLK: SERIAL CLOCK LINE
Input for the clock signal: up to 4.0 Mbits/s. 6.1.11 D/C: MODE SELECT
The address counter assigns addresses to the display data RAM for writing. The X-address X6 to X0 and the Y-address Y3 to Y0 are set separately. After a write operation, the address counter is automatically incremented by 1 according to bit V (see Section 7.7). 7.3 Display Data RAM (DDRAM)
Input to select either command or address data input. 6.1.12 SCE: CHIP ENABLE
The enable pin allows data to be clocked in. Signal is active LOW. 6.1.13 OSC: OSCILLATOR
The OM6206 contains a 65 x 102 bits static RAM which stores the display data. The RAM is divided into eight banks of 102 bytes (8 x 8 x 102 bits) and one bank of 102 bits (1 x 102 bits). During RAM access, data is transferred to the RAM via the serial interface. There is a direct correspondence between X-address and column output number. 7.4 Timing generator
When the on-chip oscillator is used this input must be connected to VDD. An external clock signal, if used, is connected to this input. If the oscillator and external clock are both inhibited by connecting pin OSC to VSS, the display is not clocked and may be left in a DC state. To avoid this the chip should always be put into Power-down mode before stopping the clock. 6.1.14 RES: RESET
The timing generator produces the various signals required to drive the internal circuitry. Internal chip operation is not affected by operations on the data bus. 7.5 Display address counter
The display is generated by continuously shifting rows of RAM data to the dot matrix LCD via the column outputs. The display status (all dots on/off and normal/inverse video) is set by bits E and D in the command `Display control' (see Table 2). 7.6 LCD row and column drivers
This signal will reset the device and must be applied to properly initialize the chip. Signal is active LOW. 7 7.1 FUNCTIONAL DESCRIPTION Oscillator
The on-chip oscillator provides the clock signal for the display system. No external components are required and the OSC input must be connected to VDD. An external clock signal, if used, is connected to this input.
The OM6206 contains 65 rows and 102 column drivers, which connect the appropriate LCD bias voltages in sequence to the display in accordance with the data to be displayed. Figure 2 shows typical waveforms. Unused outputs should be left unconnected.
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Philips Semiconductors
Product specification
65 x 102 pixels matrix LCD driver
OM6206
frame n
VLCD V2 V3 V4 V5 VSS VLCD V2 V3 V4 V5 VSS VLCD V2 V3 V4 V5 VSS VLCD V2 V3 V4 V5 VSS
frame n + 1 Vstate1(t) Vstate2 (t)
ROW0 R0(t)
ROW1 R1(t)
COL0 C0(t)
COL1 C1(t)
VLCD V3 - VSS VLCD - V2 0V V3 - V2 V4 - V5 0V VSS - V5 V4 - VLCD - VLCD VLCD V3 - VSS VLCD - V2 0V V3 - V2 V4 - V5 0V VSS - V5 V4 - VLCD - VLCD
Vstate1(t)
Vstate2 (t)
0 1 2 3 4 5 6 7 8...
... 64 0 1 2 3 4 5 6 7 8...
... 64
MGT860
Vstate1(t) = C1(t) to R0(t). Vstate2(t) = C1(t) to R1(t).
Fig.2 Typical LCD driver waveforms.
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Philips Semiconductors
Product specification
65 x 102 pixels matrix LCD driver
OM6206
DDRAM
bank 0 top of LCD
bank 1
bank 2
LCD
bank 3
bank 7
bank 8
MGT861
Fig.3 DDRAM to display mapping.
2001 Nov 14
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Philips Semiconductors
Product specification
65 x 102 pixels matrix LCD driver
7.7 Addressing
OM6206
After the last Y-address (Y = 8) Y wraps around to 0 and X increments to address the next column. In horizontal addressing mode (bit V = 0) the X-address increments after each byte (see Fig.5). After the last X-address (X = 101) X wraps around to 0 and Y increments to address the next row. After the very last address (X = 101, Y = 8) the address pointers wrap around to address X = 0, Y = 0.
Data is downloaded in bytes into the RAM matrix of OM6206 as indicated in Figs.3, 4, 5 and 6. The display RAM has a matrix of 65 x 102 bits. The columns are addressed by the address pointer. The address ranges are: X from 0 to 101 (1100101) and Y from 0 to 8 (1000). Addresses outside these ranges are not allowed. In vertical addressing mode (bit V = 1) the Y-address increments after each byte (see Fig.6). 7.7.1 DATA STRUCTURE
LSB handbook, full pagewidth 0
MSB Y-address
LSB
8 0 MSB X-address 101
MGT862
Fig.4 RAM format, addressing.
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Philips Semiconductors
Product specification
65 x 102 pixels matrix LCD driver
OM6206
handbook, full pagewidth
0 1 2 3 4 5 6 7 8 0
9 10
0
Y-address
917 X-address 101
8
MGT 863
Fig.5 Sequence of writing data bytes into RAM with vertical addressing (V = 1).
handbook, full pagewidth
0 102 204 306 408 510 612 714 816 0
1 103 205 307 409 511 613 715 817
2 104 206 308 410 512 614 716 818 X-address 917 101
0
Y-address
8
MGT864
Fig.6 Sequence of writing data bytes into RAM with horizontal addressing (V = 0).
8
INSTRUCTIONS
The instruction format is divided into two modes: * If D/C (mode select) is set LOW, the current byte is interpreted as command byte (see Table 1). * If D/C is set HIGH, the following bytes are stored in the display data RAM. After every data byte the address counter is incremented automatically. The level of the D/C signal is read during the last bit of data byte.
Every instruction can be sent in any order to the OM6206. The MSB of a byte is transmitted first (see Fig.7). Figure 8 shows one possible command stream, used to set up the LCD driver. The serial interface is initialized when SCE is HIGH. In this state SCLK clock pulses have no effect and no power is consumed by the serial interface. A negative edge on SCE enables the serial interface and indicates the start of a data transmission.
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Philips Semiconductors
Product specification
65 x 102 pixels matrix LCD driver
OM6206
MSB handbook, halfpage (DB7) data
LSB (DB0) data
MGT865
Fig.7 General format of data stream.
handbook, full pagewidth
function set (H = 1)
bias system
set VOP
temperature control
function set (H = 0)
display control
Y-address
X-address
MGT866
Fig.8 Serial data stream, example.
Figures 9 and 10 show the serial bus protocol: * When SCE is HIGH, SCLK clock signals are ignored. During the HIGH time of SCE, the serial interface is initialized (see Fig.11) * SDIN is sampled at the positive edge of SCLK * D/C indicates, whether the byte is a command (D/C = LOW) or RAM data (D/C = HIGH); it is read with the eighth SCLK pulse
* If SCE stays LOW after the last bit of a command/data byte, the serial interface expects bit 7 of the next byte at the next positive edge of SCLK (see Fig.11) * A reset pulse with RES interrupts the transmission. No data are written into the RAM. The registers are cleared. If SCE is LOW after the positive edge of RES, the serial interface is ready to receive bit 7 of a command/data byte (see Fig.11).
handbook, full pagewidth
SCE
D/C
SCLK
SDIN
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
MGT867
Fig.9 Serial bus protocol for transmission of one byte.
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Philips Semiconductors
Product specification
65 x 102 pixels matrix LCD driver
OM6206
handbook, full pagewidth
SCE
D/C
SCLK
SDIN
DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 DB7 DB6 DB5
MGT868
Fig.10 Serial bus protocol for transmission of several bytes.
handbook, full pagewidth
SCE
D/C
RES
SCLK
SDIN
DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 DB7 DB6 DB5
MGT869
Fig.11 Serial bus reset function (SCE).
handbook, full pagewidth
SCE
RES
D/C
SCLK
SDIN
DB7 DB6 DB5 DB4 DB3
DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 DB7 DB6 DB5 DB4
MGT870
Fig.12 Serial bus interrupt function (RES).
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Philips Semiconductors
Product specification
65 x 102 pixels matrix LCD driver
Table 1 Instruction set DESCRIPTION PIN D/C LOW LOW DB7 0 0 DB6 0 0 COMMAND BYTE DB5 0 1 DB4 0 0 DB3 0 0
OM6206
INSTRUCTION (H = 0 or 1) NOP Function set
DB2 0 PD
DB1 0 V
DB0 0 H
Write data (H = 0) Reserved Display control Set HIGH or LOW program range VOP Set Y-address of RAM Set X-address of RAM (H = 1) Reserved Temperature control HVgen stages Bias system Reserved Set VOP Table 2
no operation power down control; entry mode; extended instruction set control (H) writes data to display RAM do not use sets display configuration VLCD programming range select
HIGH LOW LOW LOW
D7 0 0 0
D6 0 0 0
D5 0 0 0
D4 0 0 1
D3 0 1 0
D2 1 D 0
D1 X 0 0
D0 X E PRS
sets Y-address of RAM; 0Y8 sets X-address of RAM; 0 X 101 do not use do not use set Temperature Coefficient (TCx) multiplication of high-voltage generator voltage (Sx) set Bias System (BSx) do not use (reserved for test) write VOPx to register
LOW LOW
0 1
1 X6
0 X5
0 X4
Y3 X3
Y2 X2
Y1 X1
Y0 X0
LOW LOW LOW LOW LOW LOW LOW
0 0 0 0 0 0 1
0 0 0 0 0 1
0 0 0 0 0 X
0 0 0 0 1 X
0 0 0 1 0 X
0 0 1 0
0 1 TC1 S1
1 X TC0 S0
VOP6 VOP5 VOP4 VOP3
BS2 BS1 BS0 X X X VOP2 VOP1 VOP0
Explanations for symbols in Table 1 BIT BIT VALUE 0 1 0 1 0 1 00 10 01 11 chip is active chip is in Power-down mode horizontal addressing vertical addressing use basic instruction set use extended instruction set display blank normal mode all display segments on inverse video mode VLCD programming range LOW VLCD programming range HIGH 0 00 0 0 DESCRIPTION RESET STATE 1
PD V H D and E
PRS
0 1
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Philips Semiconductors
Product specification
65 x 102 pixels matrix LCD driver
OM6206
BIT TC1 and TC0
BIT VALUE 00 01 10 11
DESCRIPTION VLCD temperature coefficient 0 VLCD temperature coefficient 1 VLCD temperature coefficient 2 VLCD temperature coefficient 3 2 x voltage multiplier 3 x voltage multiplier 4 x voltage multiplier 5 x voltage multiplier bias system VLCD programming 8.3 8.3.1 Function set PD
RESET STATE 00
S1 and S0
00 01 10 11
00
BS2 to BS0 VOP6 to VOP0 8.1 Initialization
- -
000 0000000
Immediately following power-on, all internal registers as well as the RAM content are undefined. A RES pulse must be applied. Reset is accomplished by applying an external reset pulse (active LOW) at pin RES. When reset occurs within the specified time, all internal registers are reset however the RAM is still undefined. The state after reset is described in Section 8.2. RES input must be 0.3VDD when VDD reaches VDD(min) (or higher) within a maximal time tVHRL after VDD going HIGH (see Fig.16). 8.2 Reset function
When PD = 1 the chip is in Power-down mode: * All LCD outputs at VSS (display off) * Bias generator and VLCD generator off; VLCD can be disconnected * Oscillator off (external clock possible) * Serial bus: command, function etc. * RAM contents not cleared; RAM data can be written * VLCD discharged to VSS in Power-down mode. 8.3.2 V
After reset the LCD driver has the following state: * Power-down mode (PD = 1) * Horizontal addressing (V = 0) * Normal instruction set (H = 0) * Display blank (E and D = 0) * Address counter X6 to X0 = 0, Y3 to Y0 = 0 * Temperature control (TC1 and TC0 = 0) * Bias system (BS2 to BS0 = 0) * VLCD is equal to 0 V and the high-voltage generator is switched off (VOP6 to VOP0 = 0 and PRS = 0) * After power-on, RAM data are undefined, the reset signal does not change the content of the RAM * All LCD outputs at VSS (display off).
When V = 0, the horizontal addressing is selected. The data is written into the DDRAM as shown in Fig.6. When V = 1, the vertical addressing is selected. The data is written into the DDRAM as shown in Fig.5. 8.3.3 H
When H = 0 the commands `display control', `set Y-address', `set X-address' and `set the PRS bit' (LOW or HIGH range of the high-voltage generator) can be performed; when H = 1 the others can be executed. The commands `write data' and `function set' can be executed in both cases. 8.4 8.4.1 Display control D AND E
The bits D and E select the display mode (see Table 2).
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Philips Semiconductors
Product specification
65 x 102 pixels matrix LCD driver
8.5 Set Y-address of RAM
OM6206
Y3 to Y0 define the Y-address vector address of the display RAM. Table 3 Y3 0 0 0 0 0 0 0 0 1 Notes 1. Display RAM. 2. Only the MSB is accessed. 8.6 Set X-address of RAM 8.8 Bias system X/Y-address range Y2 0 0 0 0 1 1 1 1 0 Y1 0 0 1 1 0 0 1 1 0 Y0 0 1 0 1 0 1 0 1 0 BANK(1) 0 1 2 3 4 5 6 7 8; note 2 ALLOWED X-RANGE 0 to 101 0 to 101 0 to 101 0 to 101 0 to 101 0 to 101 0 to 101 0 to 101 0 to 101
The X-address points to the columns. The range of X is 0 to 101 (65H). 8.7 Set high-voltage generator stages
The OM6206 incorporates a software configurable voltage multiplier. After reset (RES) the voltage multiplier is set to 2 x VDD2. Other voltage multiplier factors are set via the command `HVgen stages' (see Tables 1 and 2).
The bias voltage levels are set in the ratio of 1 R - R - nR - R - R giving a ------------ bias system. Different n+4 multiplex rates require different factors n (see Table 4). This is programmed by BS2 to BS0. For multiplex rate 1 : 65 the optimum bias value n is given by: n= 65 - 3 = 5.062 = 5 (1)
resulting in a 1/9 bias system. Table 4 Programming the required bias system BS1 0 0 1 1 0 0 1 1 BS0 0 1 0 1 0 1 0 1 n 7 6 5 4 3 2 1 0 RECOMMENDED MULTIPLEX RATE 1 : 100 1 : 80 1 : 65 or 1 : 65 1 : 48 1 : 40 or 1 : 34 1 : 24 1 : 18 or 1 : 16 1 : 10 or 1 : 9 or 1 : 8
BS2 0 0 0 0 1 1 1 1
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Philips Semiconductors
Product specification
65 x 102 pixels matrix LCD driver
Table 5 LCD bias voltage BIAS VOLTAGES VLCD n+3 -----------n+4 n+2 -----------n+4 2 -----------n+4 1 -----------n+4 VSS VSS VLCD
8 7 2 1 9
OM6206
SYMBOL V1 V2 V3 V4 V5 V6 8.9
BIAS VOLTAGE FOR 19 BIAS x VLCD x VLCD x VLCD x VLCD
9
9
9
Temperature control
Due to the temperature dependency of the liquid crystals viscosity the LCD controlling voltage VLCD must be increased with lower temperature to maintain optimal contrast. There are four temperature coefficients available in the OM6206 (see Fig.13). The coefficients are selected by the two bits TC1 and TC0. Table 6 shows the typical values of the temperature coefficients. The coefficients are proportional to the programmed VLCD at reference temperature.
handbook, halfpage
VLCD (V)
MGT871
(1) (2) (3) (4)
(1) TC0. (2) TC1. (3) TC2. (4) TC3.
Tcut
T (C)
Fig.13 Temperature coefficients behaviour.
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Philips Semiconductors
Product specification
65 x 102 pixels matrix LCD driver
8.10 Set VOP value
OM6206
Two overlapping VLCD ranges are selectable via the command `set HIGH or LOW program range VOP'. For the LOW range (bit PRS = 0) component a = a1 and for the HIGH range (bit PRS = 1) component a = a2. The steps in both ranges are equal to b. It should be noted that the charge pump is turned off if bits VOP6 to VOP0 and bit PRS are all set to zero (see Fig.14). For multiplexer rate 1 : 65 the optimum operation voltage of the liquid can be calculated as: 1 + 65 V LCD = -------------------------------------- x V th = 6.85 x V th 1 2 x 1 - ---------- 65 where Vth is the threshold voltage of the liquid crystal material used. (4)
The operation voltage VLCD can be set by software. The generated voltage is dependent on the programmed voltage at reference temperature (Tcut), the programmed Temperature Coefficient (TC) and the operating temperature (T). The voltage at reference temperature can be calculated as: V LCD ( Tcut ) = a + b x V OP (2) The voltage at operating temperature can be calculated as: V LCD(T) = V LCD(Tcut) + ( T - T cut ) x TC (3) The parameters are explained in Table 6. The maximum voltage that can be generated is depending on the VDD2 voltage and the display load current. Table 6
Typical values for parameters for the high-voltage generator programming VALUE 2.94 (PRS = 0) 6.75 (PRS = 1) 0.03 27 Temperature coefficients BIT VALUE TC1 TC0 0 1 0 1 -0.00 x 10-3 x VLCD(Tcut) -0.76 x -1.05 x 10-3 10-3 x VLCD(Tcut) x VLCD(Tcut) V/C V/C V/C V/C 0 0 1 1 UNIT V V V
C
SYMBOL a1 a2 b Tcut Table 7
UNIT
NAME TC0 TC1 TC2 TC3
-2.10 x 10-3 x VLCD(Tcut)
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Philips Semiconductors
Product specification
65 x 102 pixels matrix LCD driver
OM6206
handbook, full pagewidth
VLCD (V)
b charge pump off a2
a1
a1 + b
00
01
02
03
04
05
06
. . . 5F
6F
7F
00
01
02
03
04
05
06
. . . 5F
6F
7F
LOW (PRS = 0)
HIGH (PRS = 1)
MGT878
VOP6 to VOP0 to be programmed (00H to 7FH), programming ranges LOW and HIGH.
Fig.14 VOP programming at T = Tcut.
As the programming range for the internally generated VLCD allows values above the maximum allowed VLCD (9.0 V) the user has to ensure while setting the VOP value and selecting the Temperature Coefficient (TC), that under all conditions and including all tolerances the VLCD remains below 9.0 V. 9 LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 60134); notes 1 and 2. SYMBOL VDD1 VDD2,, VDD3 VLCD Vi ISS II, IO Ptot P/out Tstg Notes 1. Stresses above those listed under limiting values may cause permanent damage to the device. 2. Parameters are valid over operating temperature range unless otherwise specified. All voltages are with respect to VSS unless otherwise specified. supply voltage 1 supply voltages 2 and 3 supply voltage LCD all input voltages ground supply current DC input or output current total power dissipation power dissipation per output storage temperature PARAMETER MIN. -0.5 -0.5 -0.5 -0.5 -50 -10 - - -65 MAX. +6.5 +4.5 +9.0 VDD + 0.5 +50 +10 300 30 +150 V V V V mA mA mW mW C UNIT
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Philips Semiconductors
Product specification
65 x 102 pixels matrix LCD driver
10 HANDLING
OM6206
Inputs and outputs are protected against electrostatic discharge in normal handling. However, to be totally safe, it is desirable to take normal precautions appropriate to handling MOS devices (see "Handling MOS devices"). 11 DC CHARACTERISTICS VDD = 2.5 to 5.5 V; VSS = 0 V; VLCD = 4.5 to 9.0 V; Tamb = -40 to +85 C; unless otherwise specified. SYMBOL VDD1 VDD2, VDD3 VLCDIN VLCDOUT PARAMETER supply voltage 1 supply voltages 2 and 3 LCD voltage internally generated (voltage generator enabled) CONDITIONS MIN. 2.5 2.5 - - TYP. MAX. 5.5 4.5 UNIT V V
input supply voltage LCD output supply voltage LCD
LCD voltage externally supplied 4.5 (voltage generator disabled) LCD voltage internally generated (voltage generator enabled); note 1 normal mode; VDD = 2.8 V; VLCD = 7.6 V; no serial clock; Tamb = 25 C; no display load; 4 x charge pump; note 2 4.5
- -
9.0 9.0
V V
IDD(tot)
total supply current
-
200
300
A
Power-down mode; with internal - or external VLCD; note 3 ILCDIN supply current from external VLCD VDD = 2.8 V; VLCD = 7.6 V; no serial clock; Tamb = 25 C; no display load; notes 2 and 4 -
1.5 30
- -
A A
Logic VIL VIH IL Rcol Rrow Vcol Vrow LOW-level input voltage HIGH-level input voltage leakage current VI = VDD or VSS VLCD = 7.6 V VLCD = 7.6 V VSS -1 - - -100 -100 - - 12 12 0 0 0.3VDD V VDD +1 V A k k mV mV 0.7VDD -
Column and row outputs output resistance of columns C0 to C101 output resistance of rows R0 to R64 bias tolerance voltage of columns C0 to C101 bias tolerance voltage of rows R0 to R64 20 20 +100 +100
LCD supply voltage generator VLCD tolerance of internally generated VLCD VDD = 2.8 V; VLCD = 7.6 V; no serial clock; Tamb = 25 C; display load is 10 A; notes 5 and 6 note 7 -300 0 +300 mV
TC0
VLCD temperature coefficient 0
-
0 x 10-3VLCD
-
V/C
2001 Nov 14
19
Philips Semiconductors
Product specification
65 x 102 pixels matrix LCD driver
OM6206
SYMBOL TC1 TC2 TC3 Notes
PARAMETER VLCD temperature coefficient 1 VLCD temperature coefficient 2 VLCD temperature coefficient 3 note 7 note 7 note 7
CONDITIONS - - -
MIN.
TYP. -0.76 x 10-3V
LCD
MAX. -
UNIT V/C V/C V/C
-1.05 x 10-3VLCD - -2.10 x 10-3VLCD -
1. The maximum possible VLCD voltage that may be generated is dependent on voltage, temperature and (display) load. 2. Internal clock. 3. During Power-down mode, all static currents are switched off. 4. If external VLCD, the display load current is not transmitted to IDD. 5. Tolerance depends on the temperature; typical null at Tamb = 27 C; maximum tolerance values are measured at the temperate range limit; maximum tolerance is proportional to VLCD. 6. For TC1 to TC3. 7. VDD = 2.8 V; no serial clock; Tamb = -20 to +70 C; display load = 10 A. 12 AC CHARACTERISTICS VDD = 2.5 to 5.5 V; VSS = 0 V; VLCD = 4.5 to 9.0 V; Tamb = -40 to +85 C; unless otherwise specified. SYMBOL fosc fext fframe tVHRL tRW fSCLK tCYC tPWH1 tPWL1 tS2 tH2 tPWH2 tH5 tS3 tH3 tS4 tH4 Notes 1. f ext f frame = --------520 20 PARAMETER oscillator frequency external clock frequency frame frequency VDD HIGH to RES LOW time RES LOW pulse width fosc or fext = 38 kHz; note 1 see Fig.16 see Fig.16 VDD = 3.0 V 10%; note 3 CONDITIONS MIN. 20 - 0 (2) 100 TYP. 38 38 73 - - - - - - - - - - - - - - MAX. 67 67 - 1 - 4 - - - - - - - - - - - UNIT kHz kHz Hz s ns VDD = 2.8 V; Tamb = -20 to +70 C 22
Serial bus timing characteristics; see Fig.15 clock frequency SCLK clock cycle time SCLK pulse width HIGH SCLK pulse width LOW SCE setup time SCE hold time SCE HIGH time SCE start hold time D/C setup time D/C hold time SDIN setup time SDIN hold time note 4 0 250 100 100 60 100 100 100 100 100 100 100 MHz ns ns ns ns ns ns ns ns ns ns ns
2001 Nov 14
Philips Semiconductors
Product specification
65 x 102 pixels matrix LCD driver
2. RES may be LOW before VDD goes HIGH. 3. All signal timing is based on 20% to 80% of VDD and a maximum rise and fall time of 10 ns.
OM6206
4. tH5 is the time from the previous SCLK positive edge (irrespective of the state of SCE) to the negative edge of SCE.
handbook, full pagewidth
t S2
t H2
t PWH2
SCE t S3 D/C t CYC t PWL1 SCLK t PWH1 t S2 t H3 (t H5 ) t H5
t S4 SDIN
t H4
MGT872
Fig.15 Serial interface timing.
handbook, full pagewidth
VDD t RW RES t RW
VDD t VHRL RES
MGT873
t RW
t RW
Fig.16 Reset timing.
2001 Nov 14
21
Philips Semiconductors
Product specification
65 x 102 pixels matrix LCD driver
13 APPLICATION INFORMATION 13.1 Programming example for the OM6206 Programming example SERIAL BUS BYTE STEP D/C 1 2 start 0 0 0 1 0 0 0 0 1 DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 DISPLAY
OM6206
Table 8
OPERATION SCE is going LOW function set: PD = 0 and V = 0; select extended instruction set (H = 1) set VOP: VOP is set to a +16 x b [V] function set: PD = 0 and V = 0; select normal instruction set (H = 0) display control: set normal mode (D = 1 and E = 0) data write: Y and X are initialized to 0 by default, so they are not set here
3 4
0 0
1 0
0 0
0 1
1 0
0 0
0 0
0 0
0 0
5
0
0
0
0
0
1
1
0
0
6
1
0
0
0
1
1
1
1
1
MGT144
7
1
0
0
0
0
0
1
0
1
data write
MGT145
8
1
0
0
0
0
0
1
1
1
data write
MGT146
9
1
0
0
0
0
0
0
0
0
data write
MGT146
10
1
0
0
0
1
1
1
1
1
data write
MGT148
11
1
0
0
0
0
0
1
0
0
data write
MGT149
2001 Nov 14
22
Philips Semiconductors
Product specification
65 x 102 pixels matrix LCD driver
OM6206
SERIAL BUS BYTE STEP D/C 12 1 DB7 0 DB6 0 DB5 0 DB4 1 DB3 1 DB2 1 DB1 1 DB0 1 data write DISPLAY OPERATION
MGT151
13
0
0
0
0
0
1
1
0
1
display control: set inverse video mode (D = 1 and E = 1)
MGT152
14
0
1
0
0
0
0
0
0
0
set X-address of RAM: set address to `0000000'
MGT152
15
1
0
0
0
0
0
0
0
0
data write
MGT874
13.2
Application diagrams
handbook, full pagewidth
LCD (65 x 102 pixels)
33 row drivers
102 column drivers
32 row drivers
OM6206
VDD3 VDD2 VDD1 VSS1 VSS2 CVDD I/O (1) 6 if external oscillator is used. VDD VSS
5 (1) CVLCD
MGT875
Fig.17 Application diagram: internal charge pump is used and a single supply VDD.
2001 Nov 14
23
VLCDSENSE VLCDOUT VLCDIN
Philips Semiconductors
Product specification
65 x 102 pixels matrix LCD driver
OM6206
handbook, full pagewidth
LCD (65 x 102 pixels)
33 row drivers
102 column drivers
32 row drivers
OM6206
VDD3 VDD2 VDD1 VSS1 VSS2 CVDD2 VDD2 VSS
5 (1) C VDD1 VDD1 I/O CVLCD
MGT876
(1) 6 if external oscillator is used.
Fig.18 Application diagram: internal charge pump is used and two separate supplies VDD1 and VDD2.
handbook, full pagewidth
LCD (65 x 102 pixels)
33 row drivers
102 column drivers
VLCDSENSE VLCDOUT VLCDIN
32 row drivers
VLCDSENSE
5 (1) CVDD I/O VDD VSS VLCDIN
MGT877
(1) 6 if external oscillator is used.
Fig.19 Application diagram: external supply VLCDIN is used.
2001 Nov 14
24
VLCDIN
OM6206
VDD3 VDD2 VDD1 VSS1 VSS2
VLCDOUT
Philips Semiconductors
Product specification
65 x 102 pixels matrix LCD driver
The required minimum value for the external capacitors in an application with the OM6206 are: * CVLCD > 100 F * CVDD, CVDD1 and CVDD2 > 1 F Higher capacitor values are recommended for ripple reduction. 13.3 Application for COG
OM6206
To reduce the sensitivity of a reset to ESD/EMC disturbances for a chip-on-glass application, it is strongly recommended to implement on the glass (indium track resistance) a series input resistance in the reset line (recommended minimum value of 8 k). 13.4 Chip information
The OM6206 is manufactured in n-well CMOS technology. The substrate is on VSS potential.
The pinning of the OM6206 is optimized for single plane wiring e.g. for Chip-On-Glass (COG) display modules with display size of 65 x 102 pixels. 14 BONDING PAD INFORMATION COORDINATES(1) SYMBOL RES_B row32 row31 row30 row29 row28 row27 row26 row25 row24 row23 row22 row21 row20 row19 dummy pad dummy pad row0 row1 row2 row3 row4 row5 row6 row7 row8 row9 PAD x 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 -3870 -4270 -4340 -4410 -4480 -4550 -4620 -4690 -4760 -4830 -4900 -4970 -5040 -5110 -5180 -5320 -5355 -5005 -4935 -4865 -4795 -4725 -4655 -4585 -4515 -4445 -4375 y +935 +935 +935 +935 +935 +935 +935 +935 +935 +935 +935 +935 +935 +935 +935 +935 -935 -935 -935 -935 -935 -935 -935 -935 -935 -935 -935 row10 row11 row12 row13 row14 row15 row16 row17 row18 col0 col1 col2 col3 col4 col5 col6 col7 col8 col9 col10 col11 col12 col13 col14 col15 col16 col17 col18 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 SYMBOL PAD x -4305 -4235 -4165 -4095 -4025 -3955 -3885 -3815 -3745 -3605 -3535 -3465 -3395 -3325 -3255 -3185 -3115 -3045 -2975 -2905 -2835 -2765 -2695 -2625 -2555 -2485 -2415 -2345 y -935 -935 -935 -935 -935 -935 -935 -935 -935 -935 -935 -935 -935 -935 -935 -935 -935 -935 -935 -935 -935 -935 -935 -935 -935 -935 -935 -935 COORDINATES(1)
2001 Nov 14
25
Philips Semiconductors
Product specification
65 x 102 pixels matrix LCD driver
COORDINATES(1) SYMBOL col19 col20 col21 col22 col23 col24 col25 col26 col27 col28 col29 col30 col31 col32 col33 col34 col35 col36 col37 col38 col39 col40 col41 col42 col43 col44 col45 col46 col47 col48 col49 col50 col51 col52 col53 col54 col55 col56 col57 PAD x 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 -2275 -2205 -2135 -2065 -1995 -1925 -1785 -1715 -1645 -1575 -1505 -1435 -1365 -1295 -1225 -1155 -1085 -1015 -945 -875 -805 -735 -665 -595 -525 -455 -385 -315 -245 -175 -105 +35 +105 +175 +245 +315 +385 +455 +525 y -935 -935 -935 -935 -935 -935 -935 -935 -935 -935 -935 -935 -935 -935 -935 -935 -935 -935 -935 -935 -935 -935 -935 -935 -935 -935 -935 -935 -935 -935 -935 -935 -935 -935 -935 -935 -935 -935 -935 col58 col59 col60 col61 col62 col63 col64 col65 col66 col67 col68 col69 col70 col71 col72 col73 col74 col75 col76 col77 col78 col79 col80 col81 col82 col83 col84 col85 col86 col87 col88 col89 col90 col91 col92 col93 col94 col95 col96 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 SYMBOL PAD x +595 +665 +735 +805 +875 +945 +1015 +1085 +1155 +1225 +1295 +1365 +1435 +1505 +1575 +1645 +1715 +1785 +1925 +1995 +2065 +2135 +2205 +2275 +2345 +2415 +2485 +2555 +2625 +2695 +2765 +2835 +2905 +2975 +3045 +3115 +3185 +3255 +3325
OM6206
COORDINATES(1) y -935 -935 -935 -935 -935 -935 -935 -935 -935 -935 -935 -935 -935 -935 -935 -935 -935 -935 -935 -935 -935 -935 -935 -935 -935 -935 -935 -935 -935 -935 -935 -935 -935 -935 -935 -935 -935 -935 -935
2001 Nov 14
26
Philips Semiconductors
Product specification
65 x 102 pixels matrix LCD driver
COORDINATES(1) SYMBOL col97 col98 col99 col100 col101 row50 row49 row48 row47 row46 row45 row44 row43 row42 row41 row40 row39 row38 row37 row36 row35 row34 row33 dummy pad dummy pad row51 row52 row53 row54 row55 row56 row57 row58 row59 row60 row61 row62 row63 row64 PAD x 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 +3395 +3465 +3535 +3605 +3675 +3815 +3885 +3955 +4025 +4095 +4165 +4235 +4305 +4375 +4445 +4515 +4585 +4655 +4725 +4795 +4865 +4935 +5005 +5355 +5320 +5180 +5110 +5040 +4970 +4900 +4830 +4760 +4690 +4620 +4550 +4480 +4410 +4340 +4270 y -935 -935 -935 -935 -935 -935 -935 -935 -935 -935 -935 -935 -935 -935 -935 -935 -935 -935 -935 -935 -935 -935 -935 -935 +935 +935 +935 +935 +935 +935 +935 +935 +935 +935 +935 +935 +935 +935 +935 dummy pad VDD1 VDD1 VDD1 VDD1 VDD1 VDD1 VDD3 VDD2 VDD2 VDD2 VDD2 VDD2 VDD2 VDD2 VDD2 VDD2 VDD2 VDD2 VDD2 VDD2 SCLK SDIN DC_B SCE_B T2 OSC VSS2 VSS2 VSS2 VSS2 VSS2 VSS2 VSS2 VSS2 VSS2 VSS2 VSS2 VSS2 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 SYMBOL PAD x +4050 +3890 +3810 +3730 +3650 +3570 +3490 +3250 +3090 +3010 +2930 +2850 +2770 +2690 +2610 +2530 +2450 +2370 +2290 +2210 +2130 +1890 +1650 +1410 +1170 +930 +690 +530 +450 +370 +290 +210 +130 +50 -30 -110 -190 -270 -350
OM6206
COORDINATES(1) y +935 +935 +935 +935 +935 +935 +935 +935 +935 +935 +935 +935 +935 +935 +935 +935 +935 +935 +935 +935 +935 +935 +935 +935 +935 +935 +935 +935 +935 +935 +935 +935 +935 +935 +935 +935 +935 +935 +935
2001 Nov 14
27
Philips Semiconductors
Product specification
65 x 102 pixels matrix LCD driver
COORDINATES(1) SYMBOL VSS2 VSS2 VSS1 VSS1 VSS1 VSS1 T1 T5 T4 VSS1 VSS1 T3 VLCDIN VLCDIN VLCDIN VLCDIN VLCDIN VLCDIN VLCDOUT VLCDOUT VLCDOUT VLCDOUT VLCDOUT VLCDOUT VLCDOUT VLCDSENSE Alignment marks Circle 1 Circle 2 Circle 3 Circle 4 Note 1. All x/y coordinates (in m) are referenced to the centre of the chip (see Fig.20). -5185 +5185 +4160 -4160 -910 -910 +910 +910 PAD x 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 -430 -510 -670 -750 -830 -910 -1150 -1630 -2030 -2110 -2190 -2270 -2510 -2590 -2670 -2750 -2830 -2910 -3070 -3150 -3230 -3310 -3390 -3470 -3550 -3630 y +935 +935 +935 +935 +935 +935 +935 +935 +935 +935 +935 +935 +935 +935 +935 +935 +935 +935 +935 +935 +935 +935 +935 +935 +935 +935 Pad pitch Pad size, aluminium Bump dimensions Wafer thickness (including bumps) Wafer thickness (without bumps) Table 9 Bonding pad dimensions NAME
OM6206
DIMENSION 70 m 62 x 100 m 50 x 90 x 17.5 (5) m maximum 430 m typical 380 m
2001 Nov 14
28
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andbook, full pagewidth
dummy bump row 19
VLCDSENSE
dummy bump
VDD3
pad 1
alignment mark (1)
pad 237
y
alignment mark (1)
alignment mark (1)
2.14 mm
0, 0
x
OM6206
R18 C0 C24 C25 C49 C50 C75 C76 C101 R50 R33 R0
dummy bump
dummy bump
10.94 mm
MGT887
alignment mark (1)
R51 dummy bump
VLCDOUT
VLCDIN
VDD2
VSS1
row 32
T3 VSS1 T4
VSS2
SCLK
SDIN
OSC
RES
SCE
VDD1
R64
D/C
T5
T1
T2
2001 Nov 14
. . . . . .
Philips Semiconductors
65 x 102 pixels matrix LCD driver
. . .
. . .
29
(1) The alignment marks are circles with a diameter of 100 m.
. . .
. . .
. . .
. . .
. . .
Fig.20 Bonding pad locations.
. . .
. . .
. . .
. . .
. . .
. . .
. . .
Product specification
OM6206
Philips Semiconductors
Product specification
65 x 102 pixels matrix LCD driver
15 DEVICE PROTECTION CIRCUITS SYMBOL VDD1 174 to 179 PAD INTERNAL CIRCUIT
OM6206
MGT879
VSS1
VDD2
181 to 193
lfpage
VSS1
MGT880
VSS2
VDD3
180
MGT879
VSS1
VSS1 VSS2
214 to 217, 221, 222 200 to 213
VSS2
MGT883
VSS1
VLCDIN VLCDSENSE VLCDOUT
224 to 229 237 230 to 236
MGT879
VSS1
T2 T3
198 223
VDD1
MGT882
VSS1
2001 Nov 14
30
Philips Semiconductors
Product specification
65 x 102 pixels matrix LCD driver
OM6206
SYMBOL SDIN SCLK SCE D/C OSC RES T1 T4 T5 R0 to R64 C0 to C101 195 194 197 196 199 1 217 218 220
PAD
INTERNAL CIRCUIT
VDD1
MGT884
VSS1
2 to 15, 18 to 36, 139 to 156, 159 to 172 37 to 138
halfpage
VLCDIN 1 per block
VSS1
MGT881
2001 Nov 14
31
Philips Semiconductors
Product specification
65 x 102 pixels matrix LCD driver
16 TRAY INFORMATION
OM6206
handbook, full pagewidth
x
G H
A
C
y
D
B F
E
MGT885
Fig.21 Tray details.
handbook, halfpage
The orientation of the IC in a pocket is indicated by the position of the IC type name on the die surface with respect to the chamfer on the upper left corner of the tray. Refer to the bonding pad location diagram for the orientating and position of the type name on the die surface.
Fig.22 Tray alignment.
2001 Nov 14
OM6206
MGT886
32
Philips Semiconductors
Product specification
65 x 102 pixels matrix LCD driver
Table 10 Tray dimensions DIMENSIONS A B C D E F G H x y DESCRIPTION pocket pitch; in the x direction pocket pitch; in the y direction pocket width; in the x direction pocket width; in the y direction tray width; in the x direction tray width; in the y direction distance from cut corner to pocket centre distance from cut corner to pocket centre number of pockets in the x direction number of pockets in the y direction 4.45 mm 11.04 mm 2.24 mm 50.8 mm 50.8 mm 11.63 mm 5.41 mm 3 10
OM6206
VALUE 13.77 mm
2001 Nov 14
33
Philips Semiconductors
Product specification
65 x 102 pixels matrix LCD driver
17 DATA SHEET STATUS DATA SHEET STATUS(1) Objective data PRODUCT STATUS(2) Development DEFINITIONS
OM6206
This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Changes will be communicated according to the Customer Product/Process Change Notification (CPCN) procedure SNW-SQ-650A.
Preliminary data
Qualification
Product data
Production
Notes 1. Please consult the most recently issued data sheet before initiating or completing a design. 2. The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. 18 DEFINITIONS Short-form specification The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. 19 DISCLAIMERS Life support applications These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products 2001 Nov 14 34 for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Bare die All die are tested and are guaranteed to comply with all data sheet limits up to the point of wafer sawing for a period of ninety (90) days from the date of Philips' delivery. If there are data sheet limits not guaranteed, these will be separately indicated in the data sheet. There are no post packing tests performed on individual die or wafer. Philips Semiconductors has no control of third party procedures in the sawing, handling, packing or assembly of the die. Accordingly, Philips Semiconductors assumes no liability for device functionality or performance of the die or systems after third party sawing, handling, packing or assembly of the die. It is the responsibility of the customer to test and qualify their application in which the die is used.
Philips Semiconductors
Product specification
65 x 102 pixels matrix LCD driver
NOTES
OM6206
2001 Nov 14
35

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